Tuesday, June 4, 2019
The Equivalents In The Little Man Computer Information Technology Essay
The Equivalents In The Little Man Computer Information Technology EssayThere are devil different chronicles .MAR keeps address and MDR takes the content and read from the memory which was indicated by the MAR. These all(prenominal)(prenominal) memory location has an address. These address are identifiers them and the data which is transshipment centerd there, only as each mailbox in the LMC has both an address. Slip of paper including the data stuffed into the slot.9.19) Describe the go that occur when a system receives multiple interrupts?-If we encounter with multiple interrupts, lowborn interrupt makes a suspension of the program executing at the time, memory of programs critical parameters and transfer of control to the program which are handles the determined interrupt. After first interrupt, the second interrupt occurs. Second interrupts priority is compared to that of the original interrupt. When its priority is bigger, it gets precedence and the original interrupt pr ogram is itself suspended. In the contrary, processing of the real (original) interrupt keeps way out and the new interrupt is caught on till the original interrupt program is complete. If the higher priority interrupt process is completed, the lower interrupt is processed. When any interrupts do not occur and when any interrupts result do not occur in the suspension of all central processing unit processing, control eventually turn back up to original program which then(prenominal) resumes processing. Generally, multiple interrupts ca practice in a queue of interrupt handler programs. These programs are executed by priorities associated with each interrupt.11.19)Carefully justify the differences between a client-server nedeucerk and a peer-to-peer network. Compare the Networks in terms of capability and performance.-There are many big diffarence between a client-server and a peer-to-peer network. for the first time a peer-to-peer network do not has a central server. Each workst ation on the network shares its files equally with the others. There is no central storage or authentication of users. On the other hand, there are allocate dedicated servers and clients in a client/server network. Via the client workstations, users roll in the hay find rafts of files that generally stored on the server. The server pass on determine that users eject reach the files on the network. Peer-to-peer network is very usable because it can be installed in your homes or in a very small businesses. Employees can interact regularly there. On the other hand they are very expensive to set up and they presents almost no security. However, client-servers networks can become big to you need them. Millions of user support it and offer elaborate security measures but it is very expensive. When we compare two networks we can see that Peer-to-peer networks has any PC is an equal participant on the network, PCs are not reliant on one PC for resources like printer, approach to the n etwork is not centrally controlled, operate on a basic PC OS, generally simpler and cheaper. Client-servers A PC acts as the network controller, A PC controls access to network resources, network reach and security are centrally controlled, Need a special OS, generally more complicated but give the user more control.11.21)Clearly and carefully discuss each of the advantages of clustering.-Clustering is two computers are in interconnecting and can create a solution when a problem occurred. unity of the most important advantage of clustering is that if one of the computer has a fail, another(prenominal) computer can see the problem and automaticly recovery this problem. The users see no interrupt of access. Clustering computers for scalability include increased application performance and it has support of a greater mo of users. It can cause ability to perform concern and upgrades with limited downtime and easily scale up your cluster to a maximum of seven active Exchange Virtual S erver.8.8)Carefully discuss what happens when a cache exclude occurs.Does this result in a major slowdown in execution of the instruction? If so, Why?Cache miss means that cache controller can not do true fill the cache via the data processor acculy needs next .Cache misses slow down programs because the program can not sacking on its executing till the requested page is fetched from the main memory. In other words, The first cache miss will recompute the data, another request will get a cache miss and also recompute. As a result, this situation added calculation might slow down the whole system leading you to a loop.7.14)As computer words get larger and larger,there is a fairness of diminishing returnsthe speed of execution of real application programs does not increase and may,infact,decrease.Why do you suppose that this is so?Firstly we have to know marginal utility for understand to deminishing returns. The law of diminishing marginal utility helps people to understand the l aw of demand and the negative sloping demand curve. If you have something less, the more satisfaction you gain from each additional unit you consume. For instance when you eat a coffee bean bar, it taste is sweet and you were satisfied. However, when you continue to eat chocolate ,its taste started to disgusting for you and your pleasure will go decreasing. Another example can be unmingled System processors (CPUs). They are generally priced in an exponential manner the fastest CPU available at any given time is so expensive, and then prices decrease quickly as you go down in speed yet, the increase in performance by getting a CPU thats a little bit faster is very slight.7.16)Create the fetch-execute cycle for an instruction that moves a value from general purpose register1 to general purpose register2.Compare this cycle to the cycle for a LOAD instruction. What is the major advantage of the move over the LOAD?For movesREG1 - MARMDR - IRIR - MARMDR - REG2PC + 1 - PCFor loadPC - MAR MDR - IRIR - MARMDR - APC +1 - PCThe move fetch-execute cycle is beter because it is faster than LOAD because it occures between two registers. Registers are always faster than main memory.8.11) a) Suppose we are trying to determine the speed op a computer that executes the Little Man instruction set. The load and store instructions each make up about 25% of the instructions in a typical program. Add, subtruct, in, and out take 10% each. The various branches each take about 5%. the halt instruction is almost never used (a maximum of once each program, of course). Determine the average number of instructions executed each second if the clock ticks at 100 MHz.TheloadandStoretakefive steps .The Addand Subtrack also demand five steps, IN and outrequire four , SKIPs require four, and JUMPs require three. Then atypicalprogrammix requiresS = 0.25 (5+5) + 0.10 (5+5+ 4 + 4) + 0.05 (4 + 3) = 4.65 steps perinstructionon average.If the clock ticks at10MHz., the number ofinstructionsexecuted in a second,N = 10,000,000 / 4.65 = approximately 2.17instructionsper second.b)Now suppose that the CPU is pipelined, so that each instruction is fetched while another instruction is executing. What is the avarage number of instructions that can be executed each second with the same clock in this case?With pipelining,eachinstructionis reduced by the two steps required for the fetch. Then,N = 10,000,000 / ( 0.25 (2 + 2) + 0.10 (2 + 2 + 1 +1) + 0.05 (2 + 1) )= approx. 5.7 million IPS8.18) Some systems use a branch prediction method known as static branch prediction, so called because the prediction is made on the basis of the instructer, without regard to history. sensation possible scenario would have the system predict that all conditional backward branches are taken and all forward conditional branches are not taken. reckon your experience with this programing in the little man computer language. Would this algorithm be affective? Why or why not? What aspects of normal programming, in any programming language, support your conclusion.Little man algorithm can be affective for branch prediction method, because it is suitable for pipeling. Witout branch prediction,users have to custody till the conditional jump instruction has passed the execute stage before the next instruction can enter the fetch stage in the pipeline.You can avoid this waste of time via the branch predictor attempts.7.6) Most of the registers in the machine have two-way copy capability that is, you can copy to them from another register, and you can copy from them to another register. The MAR, on other hand, is always used as a destination register you only copy to the MAR. Explain all the way why this is so.-Addresses are always moved to the MAR there would never be a reason for an address transfer from the MAR to another register within the CPU, since the CPU controls memory transfers and is obviously aware of the memory address being used.
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